NetBurst

NetBurst
General information
Launched	November 20, 2000
Performance
Max. CPU clock rate	1.3 GHz to 3.8 GHz
FSB speeds	100 MT/s to 1066 MT/s
Physical specifications
Transistors	42M 180 nm (B2, C1, D0, E0); 55M 130 nm (B0, C1, D1, M0); 125M 90 nm (C0, D0, E0, G1); 169M 90 nm (M0, N0, R0); 230M 90 nm (A0, B0); 188M 65 nm (B1, C1, D0); 376M 65 nm (B1, C1, D0); 328M 65 nm (B0);
Cores	1-2 (2-4 threads with hyper-threading);
Sockets	Socket 423; Socket 478; Socket 603; Socket 604; LGA 771; LGA 775;
Cache
L1 cache	8 KB to 16 KB per core
L2 cache	128 KB to 4096 KB
L3 cache	4 MB to 16 MB shared
Architecture and classification
Microarchitecture	NetBurst
Instruction set	x86-16, IA-32,; x86-64 (some)
Extensions	MMX, SSE, SSE2, SSE3 (some);
Products, models, variants
Models	Celeron; Celeron D; Pentium 4; Pentium D; Xeon;
History
Predecessor	P6
Successors	Intel Core; IA-64

The NetBurst microarchitecture, called P68 inside Intel, was the successor to the P6 microarchitecture in the x86 family of central processing units (CPUs) made by Intel. The first CPU to use this architecture was the Willamette-core Pentium 4, released on November 20, 2000, and the first of the Pentium 4 CPUs; all subsequent Pentium 4 and Pentium D variants have also been based on NetBurst. In mid-2001, Intel released the Foster core, which was also based on NetBurst, thus switching the Xeon CPUs to the new architecture as well. Pentium 4-based Celeron CPUs also use the NetBurst architecture. It was discontinued in 2010 and replaced with the Core microarchitecture based on P6, released in July 2006.